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Ch1 指令集架構（ISA）
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37. RISC
#CC-01-037
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RISC
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For RISC (Reduced Instruction Set Computer), which of the following statements are true?
A
For any given level of general performance, a RISC chip will typically have far more transistors dedicated to the core logic compared with CISC (complex instruction set computer).
B
RISC allows designers to increase the size of the register set.
C
RISC usually uses uniform instruction format with the opcode in the same bit positions in every instruction, which demands less decoding complexity.
D
RISC is not suitable for pipeline design and would decrease internal parallelism.
E
RISC usually supports more addressing modes than CISC.
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完整推導請見《WH 資工筆記 · 計算機組織與結構》Ch1 指令集架構（ISA）
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