Assume that we have two processors, P1 and P2, that are different microarchitecture implementations of the same ISA. The instructions can be divided into four classes according to their CPI (class A, B, C, and D). P1 has a clock cycle of 1ns and CPIs of 1, 1, 4, and 3, respectively for each instruction class. P2 has a clock cycle of 0.8ns and CPIs of 2, 2, 2, and 2, respectively for each instruction class. Given a program with its instructions divided into the four classes as follows: 30% class A, 25% class B, 20% class C, and 25% class D. Which of the following statements about the execution of this program using processor P1 and P2 are true?