計算機組織與結構›Ch6 記憶體(Memory)
第 73 題/共 83 題
◀ CC 73/83
73. Cache、Set-Associative、Address Mapping
#CC-06-073易CacheSet-AssociativeAddress Mapping

Given (1) an instruction has 32 bits, and (2) a cache memory with 64 blocks, 16 bytes/block, and 4-way set associative. Which of the following statements are true?

📄 中央110
跳轉到第題
▤完整推導請見《WH 資工筆記 · 計算機組織與結構》Ch6 記憶體(Memory)
本章題號 · 61–80 / 83