計算機組織與結構›Ch1 指令集架構（ISA）第 11 題／共 39 題
11. MIPS Assembly、Recursive Function、Clock Cycles
#CC-01-011中MIPS AssemblyRecursive FunctionClock Cycles
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Consider the following C code and its related 32-bit MIPS assembly codes.
unsigned int fib(unsigned int n) {
if (n < 2) return(n);
else return(fib(n-1)+fib(n-2));
}
MIPS assembly（行號:指令）：
1. fib:
2. addi $sp, $sp, -12
3. sw $ra, 0($sp)
4. sw $s1, 4($sp)
5. sw $a0, 8($sp)
6. slti $t0, $a0, 2
7. beq $t0, $0, L1
8. addi $v0, $a0, 0
9. j EXIT
10. L1:
11. addi $a0, $a0, -1
12. jal fib
13. addi $s1, $v0, 0
14. addi $a0, $a0, -1
15. jal fib
16. add $v0, $v0, $s1
17. EXIT:
18. lw $ra, 0($sp)
19. lw $a0, 8($sp)
20. lw $s1, 4($sp)
21. addi $sp, $sp, 12
22. jr $ra
（暫存器編號對照表）
| Name | $zero | $v0-$v1 | $a0-$a3 |
|---|---|---|---|
| Reg no. | 0 | 2-3 | 4-7 |
| Name | $t0-$t7 | $s0-$s7 | $t8-$t9 | $sp |
|---|---|---|---|---|
| Reg no. | 8-15 | 16-23 | 24-25 | 29 |
（Op[31:26] 6-bit opcode對照表，橫軸為bit 28-26 (0~7)，縱軸為bit 31-29 (0~7)）
| bit31-29\28-26 | 0(000) | 1(001) | 2(010) | 3(011) | 4(100) | 5(101) | 6(110) | 7(111) |
|---|---|---|---|---|---|---|---|---|
| 0(000) | R-format | Bltz/gez | Jump | Jal | Beq | Bne | Blez | Bgtz |
| 1(001) | Addi | Addiu | Slti | Sltiu | Andi | Ori | Xori | Lui |
| 2(010) | TLB | FlPt | ||||||
| 4(100) | Lb | Lh | Lwl | Lw | Lbu | Lhu | Iwr | |
| 5(101) | Sb | Sh | Swl | Sw | Swr | |||
| 6(110) | Lwc0 | Lwc1- | ||||||
| 7(111) | Swc0 | Swc1 |
Assume that the execution of each j, jal, beq, and jr instruction takes 3 clock cycles. As invoking the function fib(2), the total number of clock cycles to performing all j, jal, beq, and jr instructions is:
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