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Ch5 管線化（Pipeline）
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58. Single-Cycle、Multi-Cycle、Pipeline、CPI
#CC-05-058
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Single-Cycle
Multi-Cycle
Pipeline
CPI
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Which statements are true about single-cycle, multi-cycle, and pipeline CPUs?
A
The pipeline structure reduces the response time for each instruction.
B
You are given a program with 10 instructions. If you can perfectly pipeline each instruction into 5 stages with no bubbles (and each stage takes 1 ns), it takes 14 ns to complete the 10 instructions.
C
A multi-cycle CPU is better than a single-cycle CPU because a multi-cycle CPU tends to have a lower value of CPI (cycles per instruction).
D
With more pipeline stages, the performance is less likely to be influenced by hazards.
E
None of the above.
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完整推導請見《WH 資工筆記 · 計算機組織與結構》Ch5 管線化（Pipeline）
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