計算機組織與結構›Ch6 記憶體(Memory)
第 22 題/共 83 題
◀ CC 22/83
22. Set-Associative Cache、Cache Miss Rate
#CC-06-022中Set-Associative CacheCache Miss Rate

A data cache in a processor employs 2-way set associative cache where the word size is 32 bits. The size of tag, index, offset fields in this set associative cache are 26 bits, 4 bits, and 2 bits for each. Which statements are correct when this processor executes the program 2?

        addi  $t0   $0    4
loop:   beq   $t0   $0    done
        lw    $t1   0x6($0)
        lw    $t2   0x46($0)
        addi  $t0   $t0   -1
        j     loop
done:

(Program 2)

📄 交大114
跳轉到第題
▤完整推導請見《WH 資工筆記 · 計算機組織與結構》Ch6 記憶體(Memory)
本章題號 · 21–40 / 83