計算機組織與結構›Ch6 記憶體（Memory）第 26 題／共 83 題
26. Cache Address Fields
#CC-06-026易Cache Address Fields
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A pipelined processor contains 64 KB L1 data cache, where the length of memory address is 32 bits, the block size is 64 bytes. This data cache employs 4-way set associative cache architecture. The size of physical memory on this processor is 4 GB.
Which fields in the data cache will be increased when increasing the length of memory address from 32 bits to 64 bits?
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