P is a single-issue, in-order execution, five-stage pipeline implementation of the MIPS ISA without a branch prediction unit and without any data-forwarding path. The registers are read at the second half cycle of the Decode stage. The registers are written at the first half cycle of the Writeback stage. The branch decisions and targets are determined at the Execute stage. The fetch of the next instruction after a branch will be stalled until the branch decision is made. Answer the following questions when P is used to execute Program 3:

      addi $s1, $zero, 8
      addi $s2, $s1, $zero
Loop: lw   $t0, 100($s1)
      addu $t0, $t0, $s2
      sw   $t0, 100($s1)
      addi $s1, $s1, -4
      bne  $s1, $zero, Loop
      addi $s2, $zero, $zero

（Program 3）